With the fast progress in ultra-thin gate dielectrics and the increasing interest in high-k and metal gate materials new attention is being placed on surface preparation, interface engineering and the processing of materials in general. Defining the optimum chemical state for each surface to adequately interface with the next material has become as much an issue as material and interface (in-)stabilities during deposition and high temperature annealing.

This paper will elaborate on these issues and present experimental results from studies carried out to investigate some of the major questions related to the understanding and integration of high-k dielectric materials such as Al₂O₃, ZrO₂ and HfO₂. The EDP-OCP technique (electrochemical depth profiling open circuit potential) was used for these studies, due to its exceptional sensitivity to the presence of interfacial layers and minute changes in material characteristics.