I will give a brief review of the recent research and development of ultrasmall electron devices, including nanoscale field effect transistors (FETs), single-electron transistors (SETs), and some other new devices and nanometer-scalable memory cell concepts.

It will be argued that nanofabrication permitting, silicon FETs can be scaled down to ~3 nm gate length, although below ~10 nm the devices would be extremely sensitive to random fabrication spreads, and their power consumption would grow very significantly. So far no other electron device, comparable with the FET in universality, has been found for sub-3-nm operation. For example, single-electron transistors, which are scalable to atomic size (below 1 nm), suffer from low voltage gain and high sensitivity to single charged impurities. However, there are some exciting prospects of using hybrid SET/FET circuits in new architectures for advanced information processing, including self-evolving neuromorphic networks, and several promising ideas for terabit memories and electrostatic data storage.

The talk will be based on the recent review [1]. The work was supported in part by DOE, NSF, ONR, and SRC.

[1] K. Likharev, in: H. Morkoc (ed.), Advanced Semiconductor and Organic Nano-Technologies, Pt. 1, Academic Press (2002); available on the Web at http://rsfq1.physics.sunysb.edu/~likharev/nano/ForMorkoc.pdf.